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data sheet ?2007-2008 cadeka microcircuits llc www.cadeka.com c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a c o m l i n e a r ? clc1605, CLC3605 single and triple, 1.5ghz amplifers a mplif y the human experience features n 0.1db gain fatness to 120mhz n 0.01%/0.01? differential gain/phase n 1.2ghz -3db bandwidth at g = 2 n 700mhz large signal bandwidth n 2,500v/s slew rate n 3.7nv/hz input voltage noise n 120ma output current n triple offers disable n fully specifed at 5v and 5v supplies n clc1605: pb-free sot23-5 n CLC3605: pb-free soic-16 a pplications n rgb video line drivers n high defnition video driver n video switchers and routers n adc buffer n active flters n high-speed instrumentation n wide dynamic range if amp n radar/communication receivers general description the comlinear clc1605 (single) and CLC3605 (triple) are high-perfor - mance, current feedback amplifers that provide 1.5ghz unity gain band - width, 0.1db gain fatness to 120mhz, and 2,500v/s slew rate. this high performance exceeds the requirements of high-defnition television (hdtv) and other multimedia applications. these comlinear high-performance am - plifers also provide ample output current to drive multiple video loads. the comlinear clc1605 and CLC3605 are designed to operate from 5v or +5v supplies. the CLC3605 offers a fast enable/disable feature to save power. while disabled, the outputs are in a high-impedance state to allow for multiplexing applications. the combination of high-speed, low-power, and ex - cellent video performance make these amplifers well suited for use in many general purpose, high-speed applications including high-defnition video, im - aging applications, and radar/communications receivers. typical application - driving dual video loads ordering information part number package pb-free rohs compliant operating temperature range packaging method clc1605ist5x sot23-5 yes yes -40c to +85c reel CLC3605iso16x soic-16 yes yes -40c to +85c reel CLC3605iso16 soic-16 yes yes -40c to +85c rail moisture sensitivity level for all parts is msl-1. input output a +vs -vs r g r f 75? 75? cable 75? cable 75? cable 75? 75? 75? 75? output b
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 2 clc1605 pin assignments pin no. pin name description 1 out output 2 -v s negative supply 3 +in positive input 4 -in negative input 5 +v s positive supply CLC3605 pin confguration pin no. pin name description 1 -in1 negative input, channel 1 2 +in1 positive input, channel 1 3 -v s negative supply 4 -in2 negative input, channel 2 5 +in2 positive input, channel 2 6 -v s negative supply 7 +in3 positive input, channel 3 8 -in3 negative input, channel 3 9 dis3 disable pin. enabled if pin is grounded, left foat - ing or pulled below v on , disabled if pin is pulled above v off . 10 out3 output, channel 3 11 +v s positive supply 12 out2 output, channel 2 13 dis2 disable pin. enabled if pin is grounded, left foat - ing or pulled below v on , disabled if pin is pulled above v off . 14 +v s positive supply 15 out1 output, channel 1 16 dis1 disable pin. enabled if pin is grounded, left foat - ing or pulled below v on , disabled if pin is pulled above v off . disable pin truth table pin high low* dis disabled enabled *default open state clc1605 pin confguration CLC3605 pin confguration 2 3 5 4 +in +v s -in 1 -v s out - + 2 3 4 13 14 15 16 out1 -vs dis1 +vs 1 +in1 -in1 5 6 7 +in3 -vs +in2 10 11 12 out2 +vs out3 -in2 dis2 8 -in3 9 dis3
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 3 absolute maximum ratings the safety of the device is not guaranteed when it is operated above the absolute maximum ratings. the device should not be operated at these absolute limits. adhere to the recommended operating conditions for proper de - vice function. the information contained in the electrical characteristics tables and typical performance plots refect the operating conditions noted on the tables and plots. parameter min max unit supply voltage 0 14 v input voltage range -v s -0.5v +v s +0.5v v continuous output current 120 ma reliability information parameter min typ max unit junction temperature 150 c storage temperature range -65 150 c lead temperature (soldering, 10s) 260 c package thermal resistance 5-lead sot23 221 c/w 16-lead soic 68 c/w notes: package thermal resistance ( q ja ), jdec standard, multi-layer test boards, still air. esd protection product sot23-5 soic-16 human body model (hbm) 2kv 2kv charged device model (cdm) 1kv 1kv recommended operating conditions parameter min typ max unit operating temperature range -40 +85 c supply voltage range 4.5 12 v
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 4 electrical characteristics at +5v t a = 25c, v s = +5v, r f = r g =330, r l = 150 to v s /2, g = 2; unless otherwise noted. symbol parameter conditions min typ max units frequency domain response ugbw unity gain bandwidth g = +1, v out = 0.5v pp , r f = 499 1250 mhz bw ss -3db bandwidth g = +2, v out = 0.5v pp 1000 mhz bw ls large signal bandwidth g = +2, v out = 1v pp 825 mhz bw 0.1dbss 0.1db gain flatness g = +2, v out = 0.5v pp 100 mhz bw 0.1dbls 0.1db gain flatness g = +2, v out = 1v pp 100 mhz time domain response t r , t f rise and fall time v out = 1v step; (10% to 90%) 0.6 ns t s settling time to 0.1% v out = 1v step 10 ns os overshoot v out = 0.2v step 1 % sr slew rate 2v step 1350 v/s distortion/noise response hd2 2nd harmonic distortion v out = 1v pp , 5mhz -75 dbc hd3 3rd harmonic distortion v out = 1v pp , 5mhz -85 dbc thd total harmonic distortion v out = 1v pp , 5mhz 74 db d g differential gain ntsc (3.58mhz), ac-coupled, r l = 150 0.04 % d p differential phase ntsc (3.58mhz), ac-coupled, r l = 150 0.01 ip3 third order intercept v out = 1v pp , 10mhz 37 dbm sfdr spurious free dynamic range v out = 1v pp , 5mhz 61 dbc e n input voltage noise > 1mhz 3.7 nv/hz i n input current noise > 1mhz, inverting 20 pa/hz > 1mhz, non-inverting 30 pa/hz x talk crosstalk channel-to-channel 5mhz, v out = 2v pp 60 db dc performance v io input offset voltage 0 mv dv io average drift 1.6 v/c i bn input bias current - non-inverting 3 a di bn average drift 7 na/c i bi input bias current - inverting 6 a di bi average drift 20 na/c psrr power supply rejection ratio dc 58 db i s supply current per channel 11 ma disable characteristics - CLC3605 only t on turn on time 23 ns t off turn off time 350 ns off ios off isolation 5mhz, v out = 2v pp 75 db v off power down input voltage dis pin, disabled if pin is pulled above v off disabled if dis > 1.5v v v on enable input voltage dis pin, enabled if pin is grounded, left open or pulled below v on enabled if dis < 0.5v v i sd disable supply current dis pin is pulled to v s 0.09 ma input characteristics r in input resistance non-inverting 150 k inverting 70 c in input capacitance 1.0 pf cmir common mode input range 1.5 to 3.5 v cmrr common mode rejection ratio dc 50 db
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 5 electrical characteristics at +5v continued t a = 25c, v s = +5v, r f = r g =330, r l = 150 to v s /2, g = 2; unless otherwise noted. symbol parameter conditions min typ max units output characteristics r o output resistance closed loop, dc 0.1 v out output voltage swing r l = 150 1.5 to 3.5 v i out output current 120 ma notes: 1. 100% tested at 25c
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 6 electrical characteristics at 5v t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. symbol parameter conditions min typ max units frequency domain response ugbw unity gain bandwidth g = +1, v out = 0.5v pp , r f = 499 1500 mhz bw ss -3db bandwidth g = +2, v out = 0.5v pp 1200 mhz bw ls large signal bandwidth g = +2, v out = 2v pp 700 mhz bw 0.1dbss 0.1db gain flatness g = +2, v out = 0.5v pp 120 mhz bw 0.1dbls 0.1db gain flatness g = +2, v out = 2v pp 120 mhz time domain response t r , t f rise and fall time v out = 2v step; (10% to 90%) 0.65 ns t s settling time to 0.1% v out = 2v step 13 ns os overshoot v out = 0.2v step 1 % sr slew rate 2v step 2500 v/s distortion/noise response hd2 2nd harmonic distortion v out = 2v pp , 5mhz -73 dbc hd3 3rd harmonic distortion v out = 2v pp , 5mhz -85 dbc thd total harmonic distortion v out = 2v pp , 5mhz 72 db d g differential gain ntsc (3.58mhz), ac-coupled, r l = 150 0.01 % d p differential phase ntsc (3.58mhz), ac-coupled, r l = 150 0.01 ip3 third order intercept v out = 2v pp , 10mhz 42 dbm sfdr spurious free dynamic range v out = 1v pp , 5mhz 73 dbc e n input voltage noise > 1mhz 3.7 nv/hz i n input current noise > 1mhz, inverting 20 pa/hz > 1mhz, non-inverting 30 pa/hz x talk crosstalk channel-to-channel 5mhz 60 db dc performance v io input offset voltage (1) -10 0 10 mv dv io average drift 1.6 v/c i bn input bias current - non-inverting (1) -40 19 40 a di bn average drift 7 na/c i bi input bias current - inverting (1) -35 6 35 a di bi average drift 20 na/c psrr power supply rejection ratio (1) dc 40 60 db i s supply current (1) per channel 12 18 ma disable characteristics - CLC3605 only t on turn on time 35 ns t off turn off time 410 ns off ios off isolation 5mhz, v out = 2v pp 75 db v off power down input voltage dis pin, disabled if pin is pulled above v off disabled if dis > 3v v v on enable input voltage dis pin, enabled if pin is grounded, left open or pulled below v on enabled if dis < 1v v i sd disable supply current (1) per channel, dis pin is pulled to v s 0.1 0.3 ma input characteristics r in input resistance non-inverting 150 k inverting 70 c in input capacitance 1.0 pf cmir common mode input range 4.0 v cmrr common mode rejection ratio (1) dc 40 55 db
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 7 electrical characteristics at 5v continued t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. symbol parameter conditions min typ max units output characteristics r o output resistance closed loop, dc 0.1 v out output voltage swing r l = 150 (1) 3.0 3.8 v i out output current 280 ma notes: 1. 100% tested at 25c
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 8 typical performance characteristics t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. frequency response vs. v out frequency response vs. temperature frequency response vs. c l frequency response vs. r l non-inverting frequency response inverting frequency response - 9 - 6 - 3 0 3 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) g = 1 r f = 499 g = 2 g = 5 g = 1 0 v ou t = 0.5v pp g = 1 r f = 750 - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) g = - 1 g = - 2 g = - 5 g = - 10 v ou t = 0.5v pp - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) c l = 1000pf r s = 3.3 c l = 500pf r s = 5 c l = 100pf r s = 10 c l = 50pf r s = 15 c l = 20pf r s = 20 v out = 0.5v pp - 6 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) v ou t = 0.5v pp r l = 100 r l = 50 r l = 25 - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) v ou t = 1v pp v ou t = 2v pp v ou t = 4v pp - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 2 0.1 1 10 100 1000 10000 normalized gain (db) frequency (mhz) + 85degc - 40degc + 25degc v ou t = 0.2v pp
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 9 typical performance characteristics t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. frequency response vs. v out at v s = 5v frequency response vs. temperature at v s = 5v frequency response vs. c l at v s = 5v frequency response vs. r l at v s = 5v non-inverting frequency response at v s = 5v inverting frequency response at v s = 5v - 9 - 6 - 3 0 3 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) g = 1 r f = 499 g = 2 g = 5 g = 1 0 v ou t = 0.5v pp g = 1 r f = 750 - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) g = - 1 g = - 2 g = - 5 g = - 10 v ou t = 0.5v pp - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) c l = 1000pf r s = 3.3 c l = 500pf r s = 5 c l = 100pf r s = 10 c l = 50pf r s = 15 c l = 20pf r s = 20 v out = 0.5v pp - 6 - 5 - 4 - 3 - 2 - 1 0 1 2 3 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) v ou t = 0.5v pp r l = 100 r l = 50 r l = 25 - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) v ou t = 1v pp v ou t = 2v pp v ou t = 3v pp - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 2 0.1 1 10 100 1000 10000 normalized gain (db) frequency (mhz) + 85degc - 40degc + 25degc v ou t = 0.2v pp
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 10 typical performance characteristics - continued t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. closed loop output impedance vs. frequency input voltage noise -3db bandwidth vs. v out -3db bandwidth vs. v out at v s = 5v gain flatness gain flatness at v s = 5v - 0.5 - 0.4 - 0.3 - 0.2 - 0.1 0 0.1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) v ou t = 2v pp r l = 150 r f = 330 - 0.5 - 0.4 - 0.3 - 0.2 - 0.1 0 0.1 0.1 1 10 100 1000 normalized gain (db) frequency (mhz) v ou t = 2v pp r l = 150 r f = 330 200 400 600 800 1000 1200 1400 1600 1800 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 - 3db bandwidth (mhz) v out (v pp ) 200 300 400 500 600 700 800 900 1000 1100 1200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 - 3db bandwidth (mhz) v out (v pp ) output resistance (?) frequency (hz) 10k 100k 1m 10m 100m 0.01 0.1 1 10 v s = 5.0v input voltage noise (nv/hz) frequency (mhz) 0.0001 0.001 0.01 0.1 1 10 0 5 10 15 20 25
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 11 typical performance characteristics - continued t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. cmrr vs. frequency psrr vs. frequency 2nd harmonic distortion vs. v out 3rd harmonic distortion vs. v out 2nd harmonic distortion vs. r l 3rd harmonic distortion vs. r l - 100 - 95 - 90 - 85 - 80 - 75 - 70 - 65 - 60 - 55 0 5 10 15 20 distortion (dbc) frequency (mhz) r l = 150 v ou t = 2v pp r l = 1k - 100 - 95 - 90 - 85 - 80 - 75 - 70 - 65 0 5 10 15 20 distortion (dbc) frequency (mhz) r l = 150 v ou t = 2v pp r l = 1k - 100 - 95 - 90 - 85 - 80 - 75 - 70 - 65 - 60 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 distortion (dbc) output amplitude (v pp ) 10mhz 5mhz 1mhz rl = 150 - 100 - 95 - 90 - 85 - 80 - 75 - 70 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 distortion (dbc) output amplitude (v pp ) rl = 100 10mhz 5mhz 1mhz rl = 150 cmrr (db) frequency (hz) 10k 100k 1m 10m 100m -55 -50 -45 -40 -35 -30 -25 v s = 5.0v psrr (db) frequency (hz) 10k 100k 1m 10m 100m -60 -50 -40 -30 -20 -10 0
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 12 typical performance characteristics - continued t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. differential gain & phase ac coupled output differential gain & phase dc coupled output large signal pulse response large signal pulse response at v s = 5v small signal pulse response small signal pulse response at v s = 5v - 0.125 - 0.1 - 0.075 - 0.05 - 0.025 0 0.025 0.05 0.075 0.1 0.125 0 20 40 60 80 100 120 140 160 180 200 voltage (v) t i m e ( n s ) 2.375 2.4 2.425 2.45 2.475 2.5 2.525 2.55 2.575 2.6 2.625 0 20 40 60 80 100 120 140 160 180 200 voltage (v) t i m e ( n s ) - 2.5 - 2 - 1.5 - 1 - 0.5 0 0.5 1 1.5 2 2.5 0 20 40 60 80 100 120 140 160 180 200 voltage (v) t i m e ( n s ) 1 1.5 2 2.5 3 3.5 4 0 20 40 60 80 100 120 140 160 180 200 voltage (v) t i m e ( n s ) - 0.02 - 0.015 - 0.01 - 0.005 0 0.005 0.01 - 0 . 7 - 0.5 - 0.3 - 0.1 0.1 0.3 0.5 0 . 7 diff gain (%) / diff phase ( ) i n p u t v o l t a g e ( v ) dg r l = 150 ac coupled dp - 0.03 - 0.02 - 0.01 0 0.01 0.02 0.03 - 0 . 7 - 0.5 - 0.3 - 0.1 0.1 0.3 0.5 0 . 7 diff gain (%) / diff phase ( ) i n p u t v o l t a g e ( v ) dg r l = 150 dc coupled dp
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 13 typical performance characteristics - continued t a = 25c, v s = 5v, r f = r g =330, r l = 150 to gnd, g = 2; unless otherwise noted. off isolation vs. frequency off isolation vs. frequency at v s =5v crosstalk vs. frequency (CLC3605) crosstalk vs. frequency at v s =5v (CLC3605) differential gain & phase ac coupled output at v s = 2.5v differential gain & phase dc coupled at v s = 2.5v - 0.05 - 0.04 - 0.03 - 0.02 - 0.01 0 0.01 - 0.35 - 0.25 - 0.15 - 0.05 0.05 0.15 0.25 0.35 diff gain (%) / diff phase ( ) i n p u t v o l t a g e ( v ) dg r l = 150 ac coupled dp - 0.07 - 0.06 - 0.05 - 0.04 - 0.03 - 0.02 - 0.01 0 0.01 0.02 - 0.35 - 0.25 - 0.15 - 0.05 0.05 0.15 0.25 0.35 diff gain (%) / diff phase ( ) i n p u t v o l t a g e ( v ) dg r l = 150 dc coupled dp - 95 - 90 - 85 - 80 - 75 - 70 - 65 - 60 - 55 - 50 - 45 - 40 - 35 - 30 0.1 1 10 100 crosstalk (db) frequency (mhz) v ou t = 2v pp - 95 - 90 - 85 - 80 - 75 - 70 - 65 - 60 - 55 - 50 - 45 - 40 - 35 - 30 0.1 1 10 100 crosstalk (db) frequency (mhz) v ou t = 1v pp - 110 - 105 - 100 - 95 - 90 - 85 - 80 - 75 - 70 - 65 - 60 - 55 - 50 - 45 0.1 1 10 100 off isolation (db) frequency (mhz) v ou t = 2v pp - 110 - 105 - 100 - 95 - 90 - 85 - 80 - 75 - 70 - 65 - 60 - 55 - 50 - 45 0.1 1 10 100 off isolation (db) frequency (mhz) v ou t = 1v pp
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 14 general information - current feedback technology advantages of cfb technology the clc1605 family of amplifers utilize current feedback (cfb) technology to achieve superior performance. the primary advantage of cfb technology is higher slew rate performance when compared to voltage feedback (vfb) architecture. high slew rate contributes directly to better large signal pulse response, full power bandwidth, and distortion. cfb also alleviates the traditional trade-off between closed loop gain and usable bandwidth that is seen with a vfb amplifer. with cfb, the bandwidth is primarily de - termined by the value of the feedback resistor, r f . by us - ing optimum feedback resistor values, the bandwidth of a cfb amplifer remains nearly constant with different gain confgurations. when designing with cfb amplifers always abide by these basic rules: ? use the recommended feedback resistor value ? do not use reactive (capacitors, diodes, inductors, etc.) elements in the direct feedback path ? avoid stray or parasitic capacitance across feedback re - sistors ? follow general high-speed amplifer layout guidelines ? ensure proper precautions have been made for driving capacitive loads figure 1. non-inverting gain confguration with first order transfer function v o u t v i n = ? r f r g + 1 eq. 2 1 + r f z o ( j ) v in v out z o *i err i err r l r f x1 r g figure 2. inverting gain confguration with first order transfer function cfb technology - theory of operation figure 1 shows a simple representation of a current feed - back amplifer that is confgured in the traditional non- inverting gain confguration. instead of having two high-impedance inputs similar to a vfb amplifer, the inputs of a cfb amplifer are connected across a unity gain buffer. this buffer has a high imped - ance input and a low impedance output. it can source or sink current (i err ) as needed to force the non-inverting input to track the value of vin. the cfb architecture em - ploys a high gain trans-impedance stage that senses ierr and drives the output to a value of (z o (j) * i err ) volts. with the application of negative feedback, the amplifer will drive the output to a voltage in a manner which tries to drive ierr to zero. in practice, primarily due to limita - tions on the value of z o (j), ierr remains a small but fnite value. a closer look at the closed loop transfer function (eq.1) shows the effect of the trans-impedance, z o (j) on the gain of the circuit. at low frequencies where z o (j) is very large with respect to r f , the second term of the equation approaches unity, allowing r f and r g to set the gain. at higher frequencies, the value of z o (j) will roll off, and the effect of the secondary term will begin to dominate. the -3db small signal parameter specifes the frequency where the value z o (j) equals the value of r f causing the gain to drop by 0.707 of the value at dc. for more information regarding current feedback ampli - fers, visit www.cadeka.com for detailed application notes, such as an-3: the ins and outs of current feedback am - plifers . v o u t v i n = 1 + r f r g + 1 eq. 1 1 + r f z o ( j ) v in v out z o *i err i err r g r l r f x1
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 15 application information basic operation figures 3, 4, and 5 illustrate typical circuit confgurations for non-inverting, inverting, and unity gain topologies for dual supply applications. they show the recommended bypass capacitor values and overall closed loop gain equations. figure 3. typical non-inverting gain circuit figure 4. typical inverting gain circuit figure 5. typical unity gain (g=1) circuit cfb amplifers can be used in unity gain confgurations. do not use the traditional voltage follower circuit, where the output is tied directly to the inverting input. with a cfb amplifer, a feedback resistor of appropriate value must be used to prevent unstable behavior. refer to fg - ure 5 and table 1. although this seems cumbersome, it does allow a degree of freedom to adjust the passband characteristics. feedback resistor selection one of the key design considerations when using a cfb amplifer is the selection of the feedback resistor, r f . r f is used in conjunction with r g to set the gain in the tradi - tional non-inverting and inverting circuit confgurations. refer to fgures 3 and 4. as discussed in the current feed - back technology section, the value of the feedback resis - tor has a pronounced effect on the frequency response of the circuit. table 1, provides recommended r f and associated r g val - ues for various gain settings. these values produce the optimum frequency response, maximum bandwidth with minimum peaking. adjust these values to optimize perfor - mance for a specifc application. the typical performance characteristics section includes plots that illustrate how the bandwidth is directly affected by the value of r f at various gain settings. gain (v/v r f () r g () 0.1db bw (mhz) -3db bw (mhz) 1 499 - 167 1500 2 330 330 120 1200 5 330 82.5 66 385 10 330 33 38 245 table 1: recommended r f vs. gain in general, lowering the value of r f from the recom - mended value will extend the bandwidth at the expense of additional high frequency gain peaking. this will cause increased overshoot and ringing in the pulse response characteristics. reducing r f too much will eventually cause oscillatory behavior. increasing the value of r f will lower the bandwidth. low - ering the bandwidth creates a fatter frequency response and improves 0.1db bandwidth performance. this is im - portant in applications such as video. further increase in r f will cause premature gain rolloff and adversely affect gain fatness. + - r f 0.1f 6.8f output g = - ( r f /r g ) for optimum input offset voltage set r 1 = r f || r g input +v s -v s 0.1f 6.8f r l r g r 1 + - r f 0.1f 6.8f output g = 1 r f is required for cfb amplifiers input +v s -v s 0.1f 6.8f r l + - r f 0.1f 6.8f output g = 1 + ( r f /r g ) input +v s -v s r g 0.1f 6.8f r l
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 16 driving capacitive loads increased phase delay at the output due to capacitive load - ing can cause ringing, peaking in the frequency response, and possible unstable behavior. use a series resistance, r s , between the amplifer and the load to help improve stability and settling performance. refer to figure 6. figure 6. addition of r s for driving capacitive loads table 2 provides the recommended r s for various capaci - tive loads. the recommended r s values result in <=0.5db peaking in the frequency response. the frequency re - sponse vs. c l plot, on page 5, illustrates the response of the clc1605 family. c l (pf) r s () -3db bw (mhz) 20 20 350 50 15 235 100 10 170 500 5 75 1000 3.3 52 table 1: recommended r s vs. c l for a given load capacitance, adjust r s to optimize the tradeoff between settling time and bandwidth. in general, reducing r s will increase bandwidth at the expense of ad - ditional overshoot and ringing. parasitic capacitance on the inverting input physical connections between components create unin - tentional or parasitic resistive, capacitive, and inductive elements. parasitic capacitance at the inverting input can be espe - cially troublesome with high frequency amplifers. a para - sitic capacitance on this node will be in parallel with the gain setting resistor r g . at high frequencies, its imped - ance can begin to raise the system gain by making r g appear smaller. in general, avoid adding any additional parasitic capaci - tance at this node. in addition, stray capacitance across the r f resistor can induce peaking and high frequency ringing. refer to the layout considerations section for additional information regarding high speed layout tech - niques. overdrive recovery an overdrive condition is defned as the point when either one of the inputs or the output exceed their specifed volt - age range. overdrive recovery is the time needed for the amplifer to return to its normal or linear operating point. the recovery time varies, based on whether the input or output is overdriven and by how much the range is ex - ceeded. the clc1605 family will typically recover in less than 10ns from an overdrive condition. figure 7 shows the clc1605 in an overdriven condition. figure 7. overdrive recovery power dissipation power dissipation should not be a factor when operating under the stated 1000 ohm load condition. however, ap - plications with low impedance, dc coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond its intended operat - ing range. maximum power levels are set by the absolute maximum junction rating of 150c. to calculate the junction tem - perature, the package thermal resistance value theta ja (? ja ) is used along with the total die power dissipation. t junction = t ambient + (? ja p d ) + - r f input output r g r s c l r l - 6 - 4 - 2 0 2 4 6 - 1.5 - 1 - 0.5 0 0.5 1 1.5 0 20 40 60 80 100 120 140 160 180 200 output voltage (v) input voltage (v) t i m e ( n s ) output input v in = 2v pp g = 5
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 17 where t ambient is the temperature of the working environment. in order to determine p d , the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. p d = p supply - p load supply power is calculated by the standard power equa - tion. p supply = v supply i rms supply v supply = v s+ - v s- power delivered to a purely resistive load is: p load = ((v load ) rms 2 )/rload eff the effective load resistor (rload eff ) will need to include the effect of the feedback network. for instance, rload eff in fgure 3 would be calculated as: r l || (r f + r g ) these measurements are basic and are relatively easy to perform with standard lab equipment. for design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. here, p d can be found from p d = p quiescent + p dynamic - p load quiescent power can be derived from the specifed i s val - ues along with known supply voltage, v supply . load power can be calculated as above with the desired signal ampli - tudes using: (v load ) rms = v peak / 2 ( i load ) rms = ( v load ) rms / rload eff the dynamic power is focused primarily within the output stage driving the load. this value can be calculated as: p dynamic = (v s+ - v load ) rms ( i load ) rms assuming the load is referenced in the middle of the power rails or v supply /2. figure 8 shows the maximum safe power dissipation in the package vs. the ambient temperature for the available packages. 0 0.5 1 1.5 2 2.5 - 40 - 20 0 20 40 60 80 maximum power dissipation (w) ambient temperature ( c) sot23 - 5 soic - 16 figure 8. maximum power derating better thermal ratings can be achieved by maximizing pc board metallization at the package pins. however, be care - ful of stray capacitance on the input pins. in addition, increased airfow across the package can also help to reduce the effective ? ja of the package. in the event the outputs are momentarily shorted to a low impedance path, internal circuitry and output metallization are set to limit and handle up to 65ma of output current. however, extended duration under these conditions may not guarantee that the maximum junction temperature (+150c) is not exceeded. layout considerations general layout and supply bypassing play major roles in high frequency performance. c adeka has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. follow the steps below as a basis for high frequency layout: ? include 6.8f and 0.1f ceramic capacitors for power supply decoupling ? place the 6.8f capacitor within 0.75 inches of the power pin ? place the 0.1f capacitor within 0.1 inches of the power pin ? remove the ground plane under and around the part, especially near the input and output pins to reduce para - sitic capacitance ? minimize all trace lengths to reduce series inductances refer to the evaluation board layouts below for more in - formation.
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 18 evaluation board information the following evaluation boards are available to aid in the testing and layout of these devices: evaluation board # products ceb002 clc1605 ceb013 CLC3605 evaluation board schematics evaluation board schematics and layouts are shown in fig - ures 9-14. these evaluation boards are built for dual- sup - ply operation. follow these steps to use the board in a single-supply application: 1. short -vs to ground. 2. use c3 and c4, if the -v s pin of the amplifer is not directly connected to the ground plane. figure 9. ceb002 schematic figure 10. ceb002 top view figure 11. ceb002 bottom view
data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a ?2007-2008 cadeka microcircuits llc www.cadeka.com 19 rout1 rf1 rin1 rg1 in1 out1 board mounting holes rout3 rf3 rin3 rg3 in3 out3 rout2 rf2 rin2 rg2 in2 out2 dis1 dis2 13 9 16 15 1 2 12 4 5 3,6 11,14 10 8 7 dis3 figure 12. ceb013 schematic figure 13. ceb013 top view figure 14. ceb013 bottom view
for additional information regarding our products, please visit cadeka at: cadeka.com cadeka, the cadeka logo design, comlinear, the comlinear logo design, and arctic are trademarks or registered trademarks of cadeka microcircuits llc. all other brand and product names may be trademarks of their respective companies. cadeka reserves the right to make changes to any products and services herein at any time without notice. cadeka does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by cadeka; nor does the purchase, lease, or use of a product or service from cadeka convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of cadeka or of third parties. copyright ?2007-2008 by cadeka microcircuits llc. all rights reserved. cadeka headquarters loveland, colorado t: 970.663.5452 t: 877.663.5452 (toll free) data sheet c o m l i n e a r clc1605, CLC3605 single and triple, 1.5ghz amplifers rev 1a a mplif y the human experience mechanical dimensions sot23-5 package soic-16 package

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